www.siliconstandard.com 1 of 5 n-channel enhancement-mode power mosfet low gate-charge bv dss 60v simple drive requirement r ds(on) 80mw fast switching i d 14a description the SSM9973GH is in a to-252 package, which is widely used for commercial and industrial surface mount applications, and is well suited for low voltage applications such as dc/dc converters. the through-hole version, the ssm9973gj in to-251, is available for low-footprint vertical g d s to-251 (j) g d s to-252 (h) g d s SSM9973GH,j 2/16/2005 re v.2.2 absolute maximum ratings symbol units v ds v v gs v i d @ t a =25c i d @ t a =100c i dm a p d @ t a =25c w/c t stg t j symbol value unit rthj-c thermal resistance junction-case max. 4.5 c/w rthj-a thermal resistance junction-ambient max. 110 c/w thermal data parameter storage temperature range total power dissipation 27 w -55 to 150 c operating junction temperature range -55 to 150 c linear derating factor 0.22 continuous drain current, v gs @ 10v 9 a pulsed drain current 1 40 gate-source voltage continuous drain current, v gs @ 10v 14 a parameter rating drain-source voltage 60 20 pb-free lead finish (second-level interconnect) mounting. these devices are manufactured with an advanced process, providing improved on-resistance and switching performance.
www.siliconstandard.com 2 of 5 SSM9973GH,j 2/16/2005 re v.2.2 electrical characteristics @ t j =25 o c (unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 60 - - v d bv dss / d t j breakdown voltage temperature coefficient reference to 25c, i d =1ma - 0.05 - v/c r ds(on) static drain-source on-resistance 2 v gs =10v, i d =9a - - 80 mw v gs =4.5v, i d =6a - - 100 mw v gs(th) gate threshold voltage v ds =v gs , i d =250ua 1 - 3 v g fs forward transconductance v ds =10v, i d =9a - 8.6 - s i dss drain-source leakage current (t j =25 o c) v ds =60v, v gs =0v - - 1 ua drain-source leakage current (t j =150 o c) v ds =48v ,v gs =0v - - 25 ua i gss gate-source leakage v gs =-- na q g total gate charge 2 i d =9a - 8 13 nc q gs gate-source charge v ds =48v - 3 - nc q gd gate-drain ("miller") charge v gs =4.5v - 4 - nc t d(on) turn-on delay time 2 v ds =30v - 7 - ns t r rise time i d =9a - 15 - ns t d(off) turn-off delay time r g =3.3w ,v gs =10v - 16 - ns t f fall time r d =3.3w -3- ns c iss input capacitance v gs =0v - 720 1150 pf c oss output capacitance v ds =25v - 77 - pf c rss reverse transfer capacitance f=1.0mhz - 45 - pf source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =14a, v gs =0v - - 1.2 v t rr reverse recovery time i s =9a, v gs =0 v , - 28 - ns q rr reverse recovery charge di/dt=100a/s - 27 - nc notes: 1.pulse width limited by max. junction temperature. 2.pulse width < 300us , duty cycle < 2%. 20v 100
www.siliconstandard.com 3 of 5 SSM9973GH,j 2/16/2005 re v.2.2 fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance vs. gate voltage fig 4. normalized on-resistance vs. junction temperature fig 5. forward characteristic of the fig 6. gate threshold voltage vs. reverse diode junction temperature 0 5 10 15 20 25 30 35 40 45 0123456 v ds , drain-to-source voltage (v) i d , drain current (a) v g =3.0v t c =25 o c 10v 7.0v 5.0v 4.5v 65 70 75 80 85 90 35791 1 v gs , gate-to-source voltage (v) r ds(on) (m w ) i d =9a t c =25 o c 0 4 8 12 16 20 24 28 32 01234567 v ds , drain-to-source voltage (v) i d , drain current (a) t c =150 o c v g =3.0v 10v 7.0v 5.0v 4.5v 0.0 0.5 1.0 1.5 2.0 2.5 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) v g =10v i d =9a 0 0.5 1 1.5 2 2.5 -50 0 50 100 150 t j ,junction temperature ( o c) v gs(th) (v) 0 2 4 6 8 10 12 14 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c
www.siliconstandard.com 4 of 5 SSM9973GH,j 2/16/2005 rev.2.2 fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. switching time waveform fig 12. gate charge waveform t d(on) t r t d(off) t f v ds v gs 10% 90% q v g 4.5v q gs q gd q g charge 10 100 1000 10000 1 5 9 13 17 21 25 29 v ds , drain-to-source voltage (v) c (pf) f =1.0mh z ciss coss crss 0 2 4 6 8 10 12 0481 21 6 q g , total gate charge (nc) v gs , gate to source voltage (v) v ds =48v v ds =38v v ds =30v i d =9a 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 t , pulse width (s) normalized thermal response (r thjc ) p dm duty factor = t/t peak t j = p dm x r thjc + t c t t 0.02 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) i d (a) t c =25 o c single pulse 1ms 10ms 100ms 1s dc
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